Wednesday, November 4, 2009

HRL's "brain-like" microcircuitry

HRL Labs is one of the recipients of funding for DARPA's SyNAPSE project. A recent press release (below) discusses their recent efforts in constructing a new type of neuromorphic computer architecture based on a novel nanoscale device that functions as an artificial synapse which sounds similar to the memristor.

MALIBU, Calif., October 25, 2009—HRL Laboratories, LLC, announced today it will continue groundbreaking work developing electronics that simulate the cognitive capabilities and efficiencies of the biological brain as part of the Defense Advanced Research Project Agency's SyNAPSE program, or Systems of Neuromorphic Adaptive Plastic Scalable Electronics. HRL is leading a group of industry and university laboratories with expertise in core areas of neuro and cognitive science in this pioneering endeavor.

The research marks a dramatic departure from the conventional programmable paradigm of existing computing machines. The goal of the SyNAPSE program is to bridge biology and electronics and establish an entirely new paradigm for creating intelligent machines that can interact with, react to, and actually learn from their environments.

The HRL team's ultimate goal is to build a low-power, compact electronic chip combining a novel analog circuit design and a neuroscience-inspired architecture that can address a wide range of cognitive abilities—perception, planning, decision making and motor control. In the initial phase of the SyNAPSE program, which started in October 2008, the team began to translate the neuronal and synaptic functions of the biological brain into similar microelectronic functions, ultimately designing and fabricating the base components—the neurons and synapses that will form the core of the microcircuitry of these intelligent machines.

"Our research progress in this area is unprecedented," said DARPA program manager Todd Hylton, Ph.D. "No suitable electronic synaptic device that can perform critical functions of a biological brain like spike-timing-dependent plasticity has ever before been demonstrated or even articulated."

The HRL team addressed two of the hardest problems in the initial phase: the density and endurance of the synaptic elements. A novel nanoscale device was developed that can function as a synapse while matching synaptic densities of 10 billion synapses per square centimeter with an endurance of more than 100 million cycles. "Like brain circuit elements, which also have limited lifecycles, we needed to demonstrate that the microcircuits made from these electronic synapses and neurons would last for a period of time," said Dr. Narayan Srinivasa, senior scientist at HRL and principal investigator for SyNAPSE. "We were able to show that this tiny device, which will function as a synapse, could last for five to seven years at an average operating speed of 10 Hz."

In the upcoming phase of the program, the base elements developed in the initial phase will be combined into a very-high-density, interconnecting microelectronic "fabric." "While in the initial phase we were designing cellular elements of the brain, now we're going to begin developing the microcircuits of the brain in hardware," Srinivasa said.

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HRL Laboratories, LLC, Malibu, California (www.hrl.com) is a corporate research-and-development laboratory owned by The Boeing Company and General Motors specializing in research into sensors and materials, information and systems sciences, applied electromagnetics, and microelectronics. HRL provides custom research and development and performs additional R&D contract services for its LLC member companies, the U.S. government, and other commercial companies.

Wednesday, October 28, 2009

Memristive transfer functions

Adaptive control is used to adjust the responses of a system as conditions change. However, when adaptive control systems are based on conventional microprocessor architectures there is an implicit delay depending upon the processor speed. Memristor electronics offers an alternative approach to adaptive control capable of integrating memory with parallel processing capabilities. My latest patent (US 7609086) teaches a memristive circuit configuration providing such adaptive control which is not limited by a particular processor speed.

Sunday, August 30, 2009

Knol on History of Memristor Electronics

I wrote a knol discussing the history of Bernard Widrow's memistor (1960), Leon Chua's memristor (1971), HP Labs recent paper on a solid state memristor (2008), and possible future impacts of memristors available at this link.

Saturday, August 22, 2009

Reconfigurable drive circuit using memristive materials

My eighth patent (US Patent 7,576,565) related to circuit designs using memristor materials issued this week. This patent focuses on circuit architectures used to generate pulse drive waveforms in which both the amplitude and the timing of the pulses can be reconfigured by altering the states of resistance switches in a crossbar array. One area where I think this will be particularly advantageous is in improving the real time responsiveness and the learning capability of robotic systems since the design integrates the memory and signal processing functions in contrast to conventional control systems which often segregate memory from processing.

Thursday, July 30, 2009

Memistors vs. Memristors

I recently came across an interesting technical report published in 1960 describing "memistors" as a new type of circuit element. Although this memistor is not the same as the memristor which was originally proposed by Leon Chua in 1971 the similarities are very interesting and the memistor formed the basis for ADALINE (ADAptive LInear NEurons) circuits which were commercialized briefly by a company called the Memistor Corporation in the 1960's. Some interesting trivia in that Ted Hoff, who invented the microprocessor at Intel, was a co-developer of the memistor.

Friday, July 17, 2009

Robotics and Von Neumann's Bottleneck

Last week I attended a conference on Cybernetics in which I presented a paper describing a memristor crossbar architecture performing an analog variation of the XNOR function to achieve pattern recognition for robotics. One of my main points during my talk was that the Von Neumann architecture, which dominates modern computing, is not efficient to provide robotics with real-time reactions or pattern recognition comparable to that found in human or other biological species. I think that the underlying problem results from the segregation of memory circuitry from data processing circuitry which results in an intrinsic delay (i.e. the Von Neumann bottleneck). In order to move beyond this problem new circuit elements that integrate the capabilities of both data storage and data processing in a single device are necessary. The recent developments involving memristors seem to me to be the key to such integration.

Thursday, July 2, 2009

Parallel Electron Beam Lithography Stamps

Electron beam lithography is typically limited to scientific investigation or small volume production since it is so much slower than optical lithography. However, using a high density of electron emitting sources the speed of e-beam lithography can be scaled up which is the approach taken by companies such as Multibeam Systems and Mapper Lithography.

I have had a few of my patents issue recently teaching nanostructured electron emission tips formed on the surface of a stamp structure to perform a form of parallel electron beam lithography.

US Patent 7,425,715 - Digital parallel electron beam lithography stamp

This patent teaches an addressing system for a high density array of carbon nanotube electron emitters controlled to generate a digital mask for patterning a substrate.

US Patent 7,550,747 - Parallel electron beam lithography stamp

This patent teaches a patterned array of carbon nanotube electron emitters which replicate a mask pattern and a second array of carbon nanotubes forming an alignment reference with a target substrate.