NanoMorphware

New Mem-Resistor Articles on ArXiv

2011-05-09T13:51:00.000-07:00

I posted two new articles on mem-resistors on Cornell's ArXiv website.

Dynamic Systems Model for Filamentary Mem-Resistors

Abstract

A dynamic systems model is proposed describing memory resistors which include a filament conductive bridge. In this model the system state is defined by both a dynamic tunneling barrier (associated with the filament-electrode gap) and a dynamic Schottky barrier (associated with the electron depletion width surrounding the filament-electrode gap). A general model is formulated which may be applicable to many different forms of memory resistor materials. The frequency response of the model is briefly discussed.
Keywords- mem-resistor, non-linear dynamic systems, RRAM, ReRAM, Schottky junction, tunneling junction

Set, Reset, and Retention Times for Ionic and Filamentary Mem-Resistors

Abstract

A dynamic systems model has previously been proposed for mem-resistors based on a driven damped harmonic oscillator differential equation describing electron and ionic depletion widths in a thin semiconductor film. This paper derives equations for set, reset, and retention times based on the previously proposed model.
Keywords- mem-resistor, RRAM, ReRAM

Dynamic Systems Model for Ionic Mem-Resistors based on Harmonic Oscillation

2011-03-13T23:46:00.000-07:00

I posted a new article on ArXiv proposing a revised model for ionic memory resistors (link).

Abstract:

Memristive system models have previously been proposed to describe ionic memory resistors. However, these models neglect the mass of ions and repulsive forces between ions and are not well formulated in terms of semiconductor and ionic physics. This article proposes an alternative dynamic systems model in which the system state is derived from a second order differential equation in the form of a driven damped harmonic oscillator. Application is made to Schottky and tunneling barriers.

The Missing Mem-Transistor Found

2010-12-25T15:41:00.000-08:00

I recently posted a paper and a powerpoint presentation I gave at ICECS 2010 in Athens, Greece (links below). The paper and presentation attempts to connect the dots between the mathematical memristive systems theory of Chua and Kang with the earlier memistor developed by Bernard Widrow and Ted Hoff.

Slideshare Link

ArXiv Link

Memristive Devices and Applications at ICECS 2010

2010-10-16T18:00:00.000-07:00

This year the IEEE International Conference on Electronics, Circuits, and Systems is being held in Athens, Greece (link). A special session has been organized for memristive devices and applications and I will be giving a presentation (abstract below) discussing the application of state-space system analysis to memory transistors in an analogous fashion to Chua and Kang's memristive systems theory of 2-terminal, passive devices applied to memory resistive systems.

ABSTRACT:

Memristive systems were proposed in 1976 by Leon Chua and Sung Mo Kang as a model for 2-terminal passive nonlinear dynamical systems which exhibit memory effects. Such systems were originally shown to be relevant to the modeling of action potentials in neurons in regards to the Hodgkin-Huxley model and, more recently, to the modeling of thin film materials such as TiO_2-x proposed for non-volatile resistive memory. However, over the past 50 years a variety of 3-terminal non-passive dynamical devices have also been shown to exhibit memory effects similar to that predicted by the memristive system model. This article extends the original memristive systems framework to incorporate 3-terminal, non-passive devices and explains the applicability of such dynamic systems models to 1) the Widrow-Hoff memistor, 2) floating gate memory cells, and 3) nano-ionic FETs.

Patent Data of Memristive Devices (update)

2010-07-30T23:20:00.000-07:00

I recently updated an online article (link) I wrote last year with additional patent data regarding the top 20 companies which hold patents related to memory resistance materials.

ABSTRACT

In 2008 researchers at Hewlett Packard announced the physical realization of a new type of electronic circuit element called a memristor (i.e. memory resistor) which was theoretically predicted in 1971 by Leon Chua and which has the capability to form a new type of “transistor-less” non-volatile memory. However, in actuality, many different companies including Samsung, Micron Technology, Axon Technology, and Unity Semiconductor have been working with materials having similar characteristics of memristors but had simply not known the connection between their materials and the memristive systems theory due to the previous obscurity of Chua’s original papers. This article explores the landscape of memristive electronics from a business perspective focusing on the applications, materials, and companies involved in the commercialization of memristive materials.

Op-amps with Memristive Crossbar Feedback

2010-07-13T19:33:00.000-07:00

My eleventh patent related to memristive electronics issued today. So far most of the discussion of memristor-related applications have been focused on non-volatile memory, programmable logic, or neuromorphics. This patent is more focused on analog electronic applications of memristive materials related to FPAAs.

Abstract:
A control circuit includes an operational amplifier having an inverting input, a non-inverting input, and an output, an array of impedance elements including capacitors are connected to the output of the operational amplifier, and a resistance switch crossbar array configured to store data in the form of high or low resistance states, wherein the resistance switch crossbar array is electrically connected between the array of impedance elements and the inverting input of the operational amplifier. The crossbar control circuit may be implemented in a control system to provide for adjustment of the control system to changes in environmental conditions or to change the function of the control system.

3-Terminal Memristive Devices

2010-06-21T16:56:00.000-07:00

I recently created a new Google Knol pointing out how floating gate MOSFETs as well as other memory transistors can be modeled using the memristive systems model of Chua and Kang. (link)

ABSTRACT:
The memristive systems theory was originally proposed in the 1970's to provide a mathematical model for dynamic, memory-dependent electronic devices. Such devices are becoming increasingly important to emerging technologies involving neuromorphics and adaptive control systems. However, the original formulation of memristive systems was limited to 2-terminal, passive devices. An extended model is proposed for the analysis of 3-terminal, active devices which also exhibit dynamic memory effects. It is suggested that this approach may be useful to modeling Floating-Gate memory cells used in neuromorphic computing designs.

The mythical memristor

2010-06-06T12:54:00.000-07:00

I posted my presentation from ISCAS 2010 on slideshare at this link. The presentation describes why the memristor is not actually a "4th fundamental circuit element" as claimed and why HPLabs never really found a memristor but rather an example of a memristive device which has been known for over 50 years.

Memristor Articles on Cornell ArXiv

2010-04-02T18:05:00.000-07:00

A Memadmittance Systems Model for Thin Film Memory Materials

Abstract: In 1971 the memristor was originally postulated as a new non-linear circuit element relating the time integrals of current and voltage. More recently researchers at HPLabs have linked the theoretical memristor concept to resistance switching behavior of TiO(2-x) thin films. However, a variety of other thin film materials exhibiting memory resistance effects have also been found to exhibit a memory capacitance effect. This paper proposes a memadmittance (memory admittance) systems model which attempts to consolidate the memory capacitance effects with the memristor model. The model produces equations relating the cross-sectional area of conductive bridges in resistive switching films to shifts in capacitance.

Memristive Transfer Matrices

Abstract: An electrical analysis is performed for a memristor crossbar array integrated with operational amplifiers including the effects of parasitic or contact resistances. It is shown that the memristor crossbar array can act as a transfer matrix for a multiple input-multiple output signal processing system. Special cases of the transfer matrix are described related to reconfigurable analog filters, waveform generators, analog computing, and pattern comparison.

Memristors at ISCAS 2010

2010-01-11T15:29:00.000-08:00

This year the IEEE International Symposium on Circuits and Systems (ISCAS 2010) is in Paris, France (May 30-June 2) and includes the theme of nano-bio circuit fabrics and systems. A special session has been included on Memristors and Memristive Systems and I have been asked to give a presentation on the concept of memristive transfer matrices which form the basis for several of my patents.

Abstract:

The development of memristive materials provides the integration of memory storage functions and signal control functions in a single device. This paper introduces electronic circuit configurations using memristive materials in a 1R1D crosspoint memory array as components of a reconfigurable signal transfer matrix. In one configuration an array of input voltage signals are linearly transformed into an array of output voltage signals dependent upon the memristive states of the crosspoints. In another configuration the memristive states are used to control the amplitude and timing of a waveform generator.

HRL's "brain-like" microcircuitry

2009-11-04T13:58:00.000-08:00

HRL Labs is one of the recipients of funding for DARPA's SyNAPSE project. A recent press release (below) discusses their recent efforts in constructing a new type of neuromorphic computer architecture based on a novel nanoscale device that functions as an artificial synapse which sounds similar to the memristor.

MALIBU, Calif., October 25, 2009—HRL Laboratories, LLC, announced today it will continue groundbreaking work developing electronics that simulate the cognitive capabilities and efficiencies of the biological brain as part of the Defense Advanced Research Project Agency's SyNAPSE program, or Systems of Neuromorphic Adaptive Plastic Scalable Electronics. HRL is leading a group of industry and university laboratories with expertise in core areas of neuro and cognitive science in this pioneering endeavor.

The research marks a dramatic departure from the conventional programmable paradigm of existing computing machines. The goal of the SyNAPSE program is to bridge biology and electronics and establish an entirely new paradigm for creating intelligent machines that can interact with, react to, and actually learn from their environments.

The HRL team's ultimate goal is to build a low-power, compact electronic chip combining a novel analog circuit design and a neuroscience-inspired architecture that can address a wide range of cognitive abilities—perception, planning, decision making and motor control. In the initial phase of the SyNAPSE program, which started in October 2008, the team began to translate the neuronal and synaptic functions of the biological brain into similar microelectronic functions, ultimately designing and fabricating the base components—the neurons and synapses that will form the core of the microcircuitry of these intelligent machines.

"Our research progress in this area is unprecedented," said DARPA program manager Todd Hylton, Ph.D. "No suitable electronic synaptic device that can perform critical functions of a biological brain like spike-timing-dependent plasticity has ever before been demonstrated or even articulated."

The HRL team addressed two of the hardest problems in the initial phase: the density and endurance of the synaptic elements. A novel nanoscale device was developed that can function as a synapse while matching synaptic densities of 10 billion synapses per square centimeter with an endurance of more than 100 million cycles. "Like brain circuit elements, which also have limited lifecycles, we needed to demonstrate that the microcircuits made from these electronic synapses and neurons would last for a period of time," said Dr. Narayan Srinivasa, senior scientist at HRL and principal investigator for SyNAPSE. "We were able to show that this tiny device, which will function as a synapse, could last for five to seven years at an average operating speed of 10 Hz."

In the upcoming phase of the program, the base elements developed in the initial phase will be combined into a very-high-density, interconnecting microelectronic "fabric." "While in the initial phase we were designing cellular elements of the brain, now we're going to begin developing the microcircuits of the brain in hardware," Srinivasa said.

###

HRL Laboratories, LLC, Malibu, California (www.hrl.com) is a corporate research-and-development laboratory owned by The Boeing Company and General Motors specializing in research into sensors and materials, information and systems sciences, applied electromagnetics, and microelectronics. HRL provides custom research and development and performs additional R&D contract services for its LLC member companies, the U.S. government, and other commercial companies.

Memristive transfer functions

2009-10-28T19:02:00.000-07:00

Adaptive control is used to adjust the responses of a system as conditions change. However, when adaptive control systems are based on conventional microprocessor architectures there is an implicit delay depending upon the processor speed. Memristor electronics offers an alternative approach to adaptive control capable of integrating memory with parallel processing capabilities. My latest patent (US 7609086) teaches a memristive circuit configuration providing such adaptive control which is not limited by a particular processor speed.

Knol on History of Memristor Electronics

2009-08-30T18:16:00.000-07:00

I wrote a knol discussing the history of Bernard Widrow's memistor (1960), Leon Chua's memristor (1971), HP Labs recent paper on a solid state memristor (2008), and possible future impacts of memristors available at this link.

Memistors vs. Memristors

2009-07-30T16:09:00.000-07:00

I recently came across an interesting technical report published in 1960 describing "memistors" as a new type of circuit element. Although this memistor is not the same as the memristor which was originally proposed by Leon Chua in 1971 the similarities are very interesting and the memistor formed the basis for ADALINE (ADAptive LInear NEurons) circuits which were commercialized briefly by a company called the Memistor Corporation in the 1960's. Some interesting trivia in that Ted Hoff, who invented the microprocessor at Intel, was a co-developer of the memistor.

Robotics and Von Neumann's Bottleneck

2009-07-17T12:41:00.000-07:00

Last week I attended a conference on Cybernetics in which I presented a paper describing a memristor crossbar architecture performing an analog variation of the XNOR function to achieve pattern recognition for robotics. One of my main points during my talk was that the Von Neumann architecture, which dominates modern computing, is not efficient to provide robotics with real-time reactions or pattern recognition comparable to that found in human or other biological species. I think that the underlying problem results from the segregation of memory circuitry from data processing circuitry which results in an intrinsic delay (i.e. the Von Neumann bottleneck). In order to move beyond this problem new circuit elements that integrate the capabilities of both data storage and data processing in a single device are necessary. The recent developments involving memristors seem to me to be the key to such integration.

Knol on Business Landscape for Memristor Electronics

2009-06-01T09:40:00.000-07:00

I recently put together an analysis of some of the companies involved in the development of memristor electronics available at this link.

Memristor Presentation at Cybernetics Conference

2009-05-15T12:11:00.000-07:00

The 6th annual International Conference on Cybernetics and Information Technologies will be held July 10-13 in Orlando, Florida. I will be giving a presentation on the memristor and pattern recognition circuit architectures based on memristors. The abstract is below.

Abstract:

Pattern recognition solutions based on software are often limited by the speed of data transfer between memory and processor circuitry. Solutions based on application specific electronics are usually faster but are limited in adaptability to new patterns. These deficiencies in pattern recognition present a hurdle in further developing new applications in robotics. Last year researchers at HP Labs have noted a connection between hysteretic resistance behavior of some thin film oxides with the “memristor,” a fundamental circuit element originally predicted in 1971 which possesses both data storage and signal processing capabilities. The present article describes the memristor and presents an example of a memristor pattern recognition circuit architecture combining the optimum characteristics of software and hardware pattern recognition solutions.

Memristors at TechConnect2009

2009-03-08T09:27:00.000-07:00

The Nanotech/Cleantech conference and trade show is scheduled this year for Houston, Tx on May 3-7. I have a poster presentation regarding one of my memristor-based pattern recognition circuit architectures and a presentation at TechConnect2009 describing my patented technologies.

The Missing Memcapacitor Found

2009-02-01T11:53:00.000-08:00

Last week Leon Chua published a new paper (available here) describing memcapacitors and meminductors as new theoretical circuit elements along side the memristor. I posted a knol based on a new framework for memadmittance and memimpedance I came up with based on Chua's paper.

An Introduction to Memimpedance and Memadmittance Systems Analysis

Memristor Symposium Presentation on LinkedIn

2009-01-23T23:22:00.000-08:00

For those who use LinkedIn I have posted a powerpoint copy of my presentation at UC Berkeley on my profile page (http://www.linkedin.com/in/blaisemouttet). I am also working on some memristor-related presentations and posters for some conferences this summer which I may post there.

Memristor Symposium on YouTube

2008-12-06T15:22:00.000-08:00

I recently had an opportunity to discuss some of my ideas on memristor applications at a symposium on memristors held at UC Berkeley and meet the originators of the memristor concept Leon Chua and Steve Kang as well as HP researchers Stan Williams and Greg Snider who are developing memristors for RRAM. Video of the symposium is available on Youtube at this link (my portion starts at 1:25:25).

Memristor and Memristive Systems Symposium

2008-11-17T11:13:00.001-08:00

This Friday there is a symposium on memristors at Berkeley during which I will be giving a short talk on potential applications of memristors in analog electronics. (link)

Nano-Net 2008

2008-08-31T06:13:00.000-07:00

At an upcoming conference in Boston (Sept. 14-16) concerned with the intersection between nanotechnology and network/communication theory I have a short paper entitled "Proposal for Memristors in Signal Processing."

Memristor - the key to strong A.I. ?

2008-05-01T07:12:00.000-07:00

Hewlett Packard's Information and Quantum Systems Lab recently reported on the physical realization of a new circuit element that combines the aspects of a resistor and a memory device called a memristor (see EETimes article). The "memristor" developed by HP is noted as a dual layer of titanium dioxide thin films that possesses hysteretic behavior so that the resistance can by switched by an order of magnitude of 1000 and which possesses qualities making it analogous to a neuron. Although thin film oxides used in variable resistance materials have been previously reported, they have primarily been suggested for non-volatile memory applications rather than for signal processing or pattern recognition applications. However, my various patents and patent applications teach a variety of electronic circuit configurations that implement resistance variable materials used in crossbars to construct pattern recognition circuitry, programmable control systems, waveform generation devices, arithmetic processing circuitry, and a variety of other applications.

Also of interest is this patent application from Samsung which appears to disclose the dual TiO2 resistance switching material and effect.

Logicless Computational Architectures using Nanoscale Crossbar Arrays

2008-04-26T12:51:00.000-07:00

So far my efforts at attracting companies interested in developing products based on my inventions have not gone well. While my professors at George Mason University have offered some positive feedback on some of my ideas the "not invented here" syndrome seems alive and well in many corporations. My current strategy is to publish some technical papers based on my ideas and use these papers to attract interest and corporate sponsorship in further development of the technology I am proposing. My first effort in this direction is a poster that I am presenting at the upcoming 2008 NSTI conference.

The poster describes a new type of computational system based on resistance switching crossbars. Greg Snider of Hewlett-Packard and Nantero have already made some suggestion for using crossbars for computational purposes but these suggestions have so far been limited to attempts at reproducing basic logic gates. The problem with that approach is that to create full-adders and more complex arithmetic systems multiple "tiles" of the crossbars need to be interconnected with each tile only performing the function of a single logic gate. The approach discussed in my paper instead uses a single crossbar to perform 4 bit addition using a hybrid analog/digital approach. In addition, my approach may be more easily integrable with microscale electronic components and provide some advantages in integrating data storage functions with data processing functions. Hopefully this paper and future papers that I am currently attempting to get published will at least give me some more credibility when attempting to attract companies to commercialize my ideas.

Interfacing microelectronics and nanoelectronics

2008-03-12T14:53:00.000-07:00

My second patent issued yesterday for a system of interconnecting microelectronic circuitry with nanoelectronic circuitry. This patent is one of a series of patent applications I filed as continuations from US Patent 7302513, which is my basic patent for creating a programmable signal processing system analogous to the programmable logic systems produced by companies such as Xilinx but with additional functionality for analog signal based systems used in communication and control systems applications as well as in digital applications such as pattern recognition.

While the main thrust of my first patent was not directed to nanoscale electronics I wanted to include some embodiments that could be scalable down to nanometer dimensions. However, when studying the techniques used for interfacing between microelectronics and nanoelectronics I could not find any simple interconnection system but rather a variety of demultiplexing schemes which seemed unduly complicated. The problem was that the nanowires used for nanoelectronics were so small that there was not an efficient mechanism for transferring electrical current to or from the relatively massive microwires found in conventional electronics. In addition, different fabrication techniques were used for manufacturing the nanoscale circuitry versus the microscale circuitry and combining both fabrication approaches on a common substrate seemed problematic.

However, I also knew that much work was being done with scanning tunneling microscopes and atomic force microscopes for probing and testing semiconductor substrates and several approaches to microfabrication of these devices were available. The tips of these devices could function as electrical contacts for conventional current with a metal coated AFM tip or tunneling current for an STM tip and it seemed reasonable to use these tips for selective electrical interconnects between nanoscale circuitry and microcircuits. This would solve the addressing problem for individual nanowires since a microfabricated cantilever carrying an STM or AFM tip could scan and selectively address a range of several hundred nanowires while the sharp tip at the end of the cantilever would be small enough to interface with a single nanowire at a time. In addition using two opposing substrates, one for the microcircuitry and scanning probes and the other for the nanowire circuits would remove the difficulty of trying to combine the different fabrication approaches for nanoscale and microscale electronics.

After i had filed my first basic patent application (which was not focused on the scanning probe interconnect concept) I realized that this idea could probably merit a patent in it's own right. So I filed a continuation based on this idea resulting in US Patent 7342413.

NanoMorphware- the convergence of nanomaterials and morphware

2008-03-08T18:32:00.000-08:00

Nanomaterials are molecular or nanoparticulate structures used to enhance mechanical, electrical, optical, or chemical properties. Examples of nanomaterials include carbon nanotubes, nanowires, quantum dots, and rotaxane molecules. Morphware refers to reconfigurable electronics in which circuit structures can be dynamically restructured to create different architectures. Examples of morphware include programmable logic in which the interconnection between arrays of AND gates and OR gates can be changes to produce a large variety of different logic functions.

Both nanomaterials and morphware are currently driving trends in electronics research due to the desirability of higher circuit densities for reduced size and greater portability of electronic devices and the desirability for creating circuitry that can perform multiple functions such as cell phone circuits that can be converted to radio circuits.

The title of this blog (NanoMorphware) is based on the convergence of these two trends. For example my first issued patent teaches uses resistance switching materials (such as rotaxane molecules) in a crossbar array to create programmable signal processing circuit architectures.